EECS 427 - Very Large Scale Integrated Design I
Section: 001
Term: WN 2018
Subject: Electrical Engineering and Computer Science (EECS)
Department: CoE Electrical Engineering and Computer Science
Credits:
4
Requirements & Distribution:
BS
Enforced Prerequisites:
EECS 270, 312 and 320 (each completed with a minimum grade of C or better); or graduate standing.
Other Course Info:
F, W.
BS:
This course counts toward the 60 credits of math/science required for a Bachelor of Science degree.
Repeatability:
May not be repeated for credit.
Primary Instructor:

Design techniques for rapid implementations of very large-scale integrated (VLSI) circuits, MOS technology and logic. Structured design. Design rules, layout procedures. Design aids: layout, design rule checking, logic, and circuit simulation. Timing. Testability. Architectures for VLSI. Projects to develop and lay out circuits.

EECS 427 - Very Large Scale Integrated Design I
Schedule Listing
001 (LEC)
 
20857
Open
30
 
-
MW 10:30AM - 12:00PM
011 (LAB)
P
20858
Open
30
 
-
F 4:30PM - 5:30PM
NOTE: Data maintained by department in Wolverine Access. If no textbooks are listed below, check with the department.


ISBN: 0321547748
CMOS VLSI design : a circuits and systems perspective, Author: Neil H.E. Weste, David Money Harris., Publisher: Addison Wesley 4th ed. 2010
Required
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