EECS 470 - Computer Architecture
Section: 001
Term: WN 2018
Subject: Electrical Engineering and Computer Science (EECS)
Department: CoE Electrical Engineering and Computer Science
Credits:
4
Requirements & Distribution:
BS
Enforced Prerequisites:
EECS 270 and 370 with a grade of at least C; or graduate standing.
Other Course Info:
F, W.
BS:
This course counts toward the 60 credits of math/science required for a Bachelor of Science degree.
Repeatability:
May not be repeated for credit.
Primary Instructor:

Class Overview
EECS 470 is an introductory graduate-level course in computer architecture. This course is intended to do two things: to give you a solid, detailed understanding of how computers are designed and implemented, including the central processor and memory and I/O interfaces; and to make you aware of the numerous tradeoffs in design and implementation, their interaction, their realization in both historical and state-of-the-art systems, and trends that will affect them in future systems. We will cover instruction set architectures, pipelining (including basic pipelining, multiple-instruction-per-cycle machines, out-of-order instruction execution, and vector processing), memory systems (including caches and virtual memory), I/O interfaces, operating system issues, and basic multiprocessor systems. We will also do case studies on microprocessors and systems you may have used, perhaps including the P6 (Pentium Pro/II/III), Pentium 4, and the Sony PlayStation/2.

A central part of EECS 470 is the detailed design of major portions of a substantial processor using the Verilog hardware design language (HDL).

Portions of this work will be done individually as homeworks; the bulk of the work will be done in groups of three to five as a term project. You will use modern commercial CAD tools to develop your design. This project represents a significant investment of time on your part, and is a significant portion of your grade in this class. However, in computer architecture it is particularly true that "the devil is in the details," and you will gain important experience and knowledge by coming face to face with that devil.

Textbooks:
Computer Architecture: A Quantitative Approach, 3rd edition, by Hennessy and Patterson, Morgan Kaufman Publishers.

Optional: Verilog Styles for Synthesis of Digital Systems, 1st edition, by Smith and Franzon, Prentice Hall.

Grading
Homework* 10%
Programming projects 10%
Exam 1 25%
Exam 2 25%
Project 30%

* There will be 5 homework assignments and 1 quiz each of equal weight that make up this score. The lowest score of those 6 grades will be dropped. You must achieve passing grades on the both the project/homework as well as on the exams in order to pass the class! A rough measure of passing is that those within 2.0 standard deviations of the median of the students receiving a grade would be considered passing. A passing grade is a "C".

EECS 470 - Computer Architecture
Schedule Listing
001 (LEC)
 
10683
Open
46
 
-
TuTh 12:00PM - 1:30PM
011 (LAB)
P
17357
Open
25
 
-
F 10:30AM - 12:30PM
Note: LAB 011 will meet in Beyster 1620 A-B.
012 (LAB)
P
14279
Open
21
 
-
Th 4:00PM - 6:00PM
Note: LAB 012 will meet in Beyster 1620 A-B.
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