EECS 427 - Very Large Scale Integrated Design I
Section: 001
Term: FA 2018
Subject: Electrical Engineering and Computer Science (EECS)
Department: CoE Electrical Engineering and Computer Science
Requirements & Distribution:
Enforced Prerequisites:
EECS 270, 312 and 320 (each completed with a minimum grade of C or better); or graduate standing.
Other Course Info:
F, W.
This course counts toward the 60 credits of math/science required for a Bachelor of Science degree.
May not be repeated for credit.
Primary Instructor:

Design techniques for full-custom VLSI circuits. Design rule checking, logic and circuit simulation. CMOS circuit delay and power analysis. High performance and low power VLSI systems. CMOS logic circuit families, adders, multipliers, memory arrays, sequential circuits, and interconnects. Clock and power distribution. Major design project to implement a RISC processor.

EECS 427 - Very Large Scale Integrated Design I
Schedule Listing
001 (LEC)
MW 1:30PM - 3:00PM
Note: STUDENTS ARE AUTO-ENROLLED IN LECTURE WHEN THEY ELECT A LAB. When the class is full, to request an override, a waitlisted student must submit a request to the ECE Override System at .
011 (LAB)
Tu 5:30PM - 6:30PM
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