EECS 470 - Computer Architecture
Section: 001
Term: FA 2018
Subject: Electrical Engineering and Computer Science (EECS)
Department: CoE Electrical Engineering and Computer Science
Credits:
4
Requirements & Distribution:
BS
Enforced Prerequisites:
EECS 270 and 370 with a grade of at least C; or graduate standing.
Other Course Info:
F, W.
BS:
This course counts toward the 60 credits of math/science required for a Bachelor of Science degree.
Repeatability:
May not be repeated for credit.
Primary Instructor:

Topics include out-of-order processors and speculation, memory hierarchies, branch prediction, virtual memory, cache design, multi-processors, and parallel processing including cache coherence and consistency. Emphasis on power and performance trade-offs. Groups design an advanced (e.g. out-of-order, multi-core, SMT) processor using an HDL.

EECS 470 - Computer Architecture
Schedule Listing
001 (LEC)
 
10433
Closed
0
 
26
MW 3:00PM - 4:30PM
011 (LAB)
P
10434
Closed
0
 
22
F 10:00AM - 12:00PM
012 (LAB)
P
16786
Closed
0
 
4
F 12:30PM - 2:30PM
NOTE: Data maintained by department in Wolverine Access. If no textbooks are listed below, check with the department.


Note:
Textbook is available for free here (http://site.ebrary.com/lib/umich/detail.action?docID=10506454) if you access from a university IP address.
ISBN: 012383872X
Computer architecture : a quantitative approach, Author: John L. Hennessy, David A. Patterson., Publisher: Morgan Kaufmann 5th ed. 2011
Required
Other Textbook Editions OK.
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